This invention relates to circuit testing, and more particularly, to circuits with dynamic test mode switching capabilities for use when testing programmable integrated circuits such as programmable logic device integrated circuits.
Programmable logic devices are a type of integrated circuit that can be customized by a user to implement a desired logic design. In a typical scenario, a logic designer uses a logic design system to design a logic circuit. The logic design system uses information on the hardware capabilities of a given programmable logic device to help the designer implement the logic circuit using the resources available on that given programmable logic device. The logic design system creates configuration data. When the configuration data is loaded into the programmable logic device, it programs the logic of the programmable logic device so that the programmable logic device implements the designer's logic circuit.
To test a programmable logic device, the programmable logic device is loaded with test configuration data. Groups of test signals called test vectors are applied to the inputs of the programmed device and the resulting output signals are monitored.
During testing, it is often necessary to load hundreds or thousands of different sets of test configuration data into the programmable logic device. As a result, it is not uncommon for each device to take 6-7 seconds to test. In a production environment, this is a considerable delay.
High-speed testing arrangements have been developed to address the delays associated with testing programmable logic devices. With these arrangements, a set of parallel lines is used to help speed up the process of loading test configuration data. However, such high-speed testing arrangements require large numbers of free input pins, which are not always available, particularly with smaller packages.
It would therefore be desirable to provide improved ways in which to load test configuration data during testing speed of programmable integrated circuits such as programmable logic device integrated circuits.